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TACC-Intel Highly Parallel Computing Symposium

April 10th-11th, 2012
Austin, TX

Available papers can be accessed by clicking on the paper title. If presentation slides were submitted, they are linked under the presentation title/author.

Program

Day One (April 10, 2012):

8:00-8:30am Continental Breakfast
8:30-10:00am Invited Talks:
"Selecting the right Parallel Programming Model: Intel's perspective and commitments," James Reinders
"Many core processors at Intel: lessons learned and remaining challenges," Tim Mattson
10:00-10:30am Break
10:30-Noon Paper Session 1: "Early MIC Programming Experiences, Part 1"
"Experiences with ENZO on the Intel MIC Processor," Robert Harkness
"Evaluating Intel's Many Integrated Core Architecture for Climate Science," Theron Voran
"Early Experiences Developing CFD Solvers for the Intel MIC Architecture," Ryan C. Hulguin
Noon-1:00pm Lunch
1:00-2:30pm Paper Session 2: "Early MIC Programming Experiences, Part 2"
"Dense Linear Algebra Factorization in OpenMP and Cilk Plus on Intel MIC: Development Experiences and Performance Analysis," David Hudak
"All-electron density functional theory on Intel MIC: Elk," W. Scott Thornton
*BEST PAPER AWARD* - "Early Experiences Porting Scientific Applications to the Many Integrated Core (MIC) Platform," Karl W. Schulz
2:00-2:30pm Break
3:00-4:00pm Paper Session 3: "Performance and Communications on SCC"
"In-Memory Communication Mechanisms for Many-Cores -- Experiences with the Intel SCC," Randolf Rotta
"Analyzing Application Performance Bottlenecks on Intel's SCC," Xu Liu
4:00-5:30pm Intel Video Presentation: "The Many Core Journey"
Poster Session:
"ManyClaw: Slicing and dicing Riemann solvers for next generation highly parallel architectures," Andy Terrel, Kyle Mandli
"A new class of massively parallel direction splitting for the incompressible Navier-Stokes equation," Jean-Luc Guermond, Peter Minev Travis Thompson
"NICS Experiences Operating Clusters with Intel MIC Co-Processors," Ryan Braby, Troy Baer, John Wynkoop, Matt Ezell, R. Glenn Brook
"BLIS: Beyond the BLAS," Bryan Marker, Field Van Zee, Robert Van De Geijn, Lee Killough
"Adding shared memory parallelism to FLASH for many-core architectures," Christopher Daley, John Bachan, Sean Couch, Anshu Dubey, Milad Fatenejad, Brad Gallagher, Dongwook Lee, Klaus Weide
6:00pm Dinner

Day Two (April 11, 2012):

8:00-8:30am Continental Breakfast
8:30-10:00am Invited Talks:
"Programming Models for Intel Xeon processors and Intel MIC Architecture," Scott McMillan
"The Many Core Path Going Forward," Nash Palaniswamy
10:00-10:30am Break
10:30-Noon Paper Session 4: "Software Tools for MIC"
"PerfExpert and MACPO: Which code segments should (not) be ported to MIC?" Ashay Rane
*BEST STUDENT PAPER AWARD* - "Intra-MIC MPI Communication using MVAPICH2: Early Experience," Sreeram Potluri
"Automatic Transformations for Effective Parallel Execution on Intel Many Integrated Cores Automatic Transformations for Effective Parallel Execution on Intel Many Integrated Cores," Kevin Stock
Noon-1:00pm Lunch
1:00-5:00pm Optional "Preparing for Many Core Programming" Tutorial