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TACC-Intel Highly Parallel Computing Symposium

Papers and Presentations Now Available on Program Page.

April 10th-11th, 2012
Austin, TX

The TACC-Intel Highly Parallel Computing Symposium will take place on April 10th and 11th 2012 at the Texas Advanced Computing Center (TACC) in Austin, TX. In the past year, the Intel MIC program has advanced forward towards the first commercial many core co-processor, code named Knights Corner. Accordingly, this symposium will expand to have two major focus areas: the Many-core Applications Research Community (MARC) for the Single-Chip Cloud Computer (SCC) experimental architecture, and the emerging community around the forthcoming Intel Many Integrated Core (MIC) architecture family of products for productivity solutions.

In April, researchers from different fields will present their current and future work. For SCC the focus will be advanced hardware architecture concepts implementation and how to use the SCC to explore tools and software that take advantage of the finer granularity data flow. For Intel MIC the focus is on programming productivity for highly parallel applications. The host site, TACC, will be the site of the first large scale supercomputer system based on Intel MIC in January 2013.

Interested researchers are invited to submit unpublished reports, both on work in process or new results regarding software for novel many-core hardware architectures. While the Intel Single-Chip Cloud Computer (SCC) has served as common research platform for most MARC members, recent availability of the development kits for the Intel MIC family of products has expanded the community for many core applications research. Some of the concepts of the SCC will be realized in production form when the Intel MIC product line becomes available. Other interesting research on next generation many-core platforms is also relevant for this event.

Topics of interest include, but are not limited to:

Operating system support for novel many-core architectures
Dealing with legacy software on novel many-core architectures
Traditional and new programming models for novel many-core hardware
Experiences porting, running, or developing applications
New approaches for leveraging on-die messaging facilities

All authors are invited to submit original and unpublished work as either regular papers (maximum 6 pages) for oral presentation or short papers (maximum 4 pages) for poster presentation. Papers describing work-in-progress are also welcome. Paper submission is possible through EasyChair at http://www.easychair.org/conferences/?conf=tihpcs11.

Submissions are due February 15th, 2012.

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Hotel Accomodations: The Westin Austin at The Domain - Group rate available until March 26, 2012.