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Kazushige Goto

Kazushige Goto
Kazushige Goto

Research Associate
High Performance Computing
(512) 471-3864
kgoto@tacc.utexas.edu

Kazushige Goto joined TACC in 2004; he had been a visitor in the lab of computer scientist Robert van de Geijn at UT Austin in 2003-2003. He is well known in the high-performance computing community for his implementations of the linear algebra libraries known as the BLAS (Basic Linear Algebra Subprogams), which are targeted to specific computer architectures and which are the fastest implementations to date. Goto graduated from Waseda University with a master's degree in power engineering, and has worked as a patent examiner in the Japan Patent Office.

Areas of Research
  • Linear algebra libraries
  • Performance measurement
  • High-performance microprocessor architecture
Publication

Kazushige Goto and Robert van de Geijn: On Reducing TLB Misses in Matrix Multiplication. FLAME Working Note #9, The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-2002-55. Nov. 2002. (This paper is being revised for resubmission to the ACM Transactions on Mathematical Software.)

Software
  • GOTO BLAS libraries. Target architectures: Intel Pentium4, Itanium2.
  • GOTO BLAS libraries. Target architectures: Alpha EV5 and EV6 processor.
  • GOTO BLAS libraries. Target architectures: Intel Pentium3, Itanium, Itanium2, IBM Power3, Power4, PPC970, AMD Opteron.
Education
M.S., Power Engineering, Waseda University
Personal Website